What Does A Status Register Do

What Is a Status Register?

The status register, also known equally the status code register, is a core component of the figurer system-a part of the operator. The status annals is used to store two types of information: i is the various status information (condition code) that reflects the current instruction execution result, such equally Carry (CF scrap), overflow (OF chip), positive or negative effect (SF scrap), whether the upshot is zero (ZF bit), parity flag bit (P bit), etc .; the other is to store control information ( PSW: program condition word annals), such equally enable interrupt (IF bit), trace flag (TF bit), etc. In some machines, the PSW is called a flag register (FR).

Status register

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The status register, too known as the status code register, is the core component of a computer system-

PSW Definition of status annals PSW flag:

PSW is an 8-bit binary annals used to store the condition of the CPU after the instruction is received. Information technology is commonly filled by the CPU, merely the user can likewise change the value of each status bit. The definition of each flag is equally follows:

Bit7 Cy

Bit6 AC

Bit5 F0

Bit4 RS1

Bit3 RS0

Bit2 OV

Bit1-

Bit0 P

ARM Program Status Annals in ARM

There are 6 condition registers in ARM. The ARM7TDMI core contains 1 CPSR and five SPSRs for exception handlers. CPSR reflects the current state of the processor and includes:

4 condition code flags (negative (N), zero (Z), deport (C), and overflow (V));

2 interrupt disable bits, each controlling one type of interrupt;

5 $.25 encoding the current processor way;

1 bit used to signal the currently executing instruction (ARM or Thumb).

PSW Explanation of each flag bit in the status register PSW:

1. CY (Carry): Used to point deport in addition and infringe in subtraction. If there is carry in add-on or infringe in subtraction, the CY bit is one, otherwise it is 0.

ii. Ac (Auxiliary Carry): Basically the same as CY, except the operation between the lower 4 $.25 and higher 4 bits.

3.F0 (Flag Zippo user flag fleck): This bit is a flag bit set by the user according to his own needs. The user can set up the bit to determine the flow and co-operative of the program.

iv. RS1, RS0: 8051 has 8 eight-bit working registers R0 ~ R7. Its bodily physical geography in RAM tin exist selected and determined as needed. 00: 00H ~ 07H

01: 08H ~ 0FH

10: 10H ~ 17H

xi: 18H ~ 1FH

v.OV: Indicates whether an overflow occurred during the operation. If the event exceeds the range of data that can be represented by an 8-flake binary number, that is, a signed number -128 ~ + 127, the flag bit is fix to 1.

6.OP: The parity flag bit is used to indicate the parity of the number of 1 in the operation result. If P = 0, the number of one in accumulator A is even; if P = ane, the number of 1 in accumulator A is even. The number is odd.